Practicum ASIC Design (ASIC Design Laboratory)
The ASIC Design Laboratory has been taught at the
University of Twente
from the academic year 1993-1994 until the academic year 2002-2003.
It now has a successor called the
System-on-Chip Laboratory.
It consisted of
31 sessions of four hours each in which the whole mixed-signal ASIC design
traject was traversed. They were partitioned into four modules:
-
System design (12 sessions): this module mainly consisted of a first
introduction to VHDL and VHDL synthesis followed by the design of the
dialmemo
chip.
-
Testing (5 sessions): this module taught the principles of test
pattern generation and mixed-signal testing, focussing on the testing of
the
dialmemo
chip.
-
Digital circuit design (9 sessions): this module taught the
principles of digital CMOS gates, circuit-level simulation and circuit
layout.
-
Analog circuit design (5 sessions): this module did the same for
analog CMOS circuits and focussed on the D/A converter used in the
dialmemo
chip.
More detailed descriptions of the approach followed at Twente University
for teaching a first course in ASIC design can be found in the following two
publications:
-
Tangelder, R.J.W.T., S.H. Gerez, H.G. Kerkhoff, E.A.M. Klumperink,
J. Smit, H. Snijders, H. Speek and H. de Vries, "The ASIC Design
Course at Twente", 2nd European Workshop on Microelectronics
Education, Noordwijkerhout, The Netherlands, (May 1998).
-
Tangelder, R.J.W.T., H. De Vries, E.A.M. Klumperink, H. Snijders,
H.G. Kerkhoff, J. Smit, S.H. Gerez and H. Speek, "Mixed-Signal
Testing at the ASIC Design Course at Twente University", In: B.
Courtois, N. Guillemot, G. Kamarinos and G. Stehelin (Eds.),
Microelectronics Education, Kluwer Academic Publishers, Dordrecht,
pp 205-208, (2000).
Last update on:
Sun Jan 28 00:00:39 CET 2018
by Sabih
Gerez.